DDDeeedddiiippprrrooogggTTTeeeccchhhnnnooolllooogggyyyCCCooo...LLLtttdddwwwwwwwww...dddeeedddiiippprrroooggg...cccooommmDediProg Page 1/8December 09DediProg4F., No.7, Ln. 143, Xinming Rd., Neihu Dist., Taipei City 114, TaiwanUniversal SPI Pin headerFor BIOStools seriesThis document aims to standardize the SPI Pin header over the different motherboard projects and platforms to benefit of all the BIOS solutions for development, production and repairing with a unique connector:Update the On board BIOSBoot from a Backup MemoryEmulate the BIOS memory for very fast update(less than 3seconds)Debug your motherboard through SPI busDisplay POST messages from SPI busbefore and after production
DDDeeedddiiippprrrooogggTTTeeeccchhhnnnooolllooogggyyyCCCooo...LLLtttdddwwwwwwwww...dddeeedddiiippprrroooggg...cccooommmDediProg Page 2/8December 09Table of content:I.Background..........................................................................3II.SPI Universal Pin Header.......................................3III.Schematics suggestions............................................5IV.BIOS solutions supported.......................................61.Motherboard boots from back up SPI Flash..........................................62.Direct update of the on board SPI Flash................................................73.BIOS update in less than 3 seconds.......................................................74.Collect SPI protocol trace during boot process......................................75.Display debug POST messages through SPI bus...................................76.BIOS Debugger......................................................................................8Important notice:This document is providedfor referenceand must not be disclosed without consent of DediProg. However, no responsibility is assumedfor errors that might appear.DediProg reserves the right to make any changesto the product and/or the specificationat any time without notice.No part of this document may be copied or reproduced in any form or by any meanswithout prior written consent of DediProg.
DDDeeedddiiippprrrooogggTTTeeeccchhhnnnooolllooogggyyyCCCooo...LLLtttdddwwwwwwwww...dddeeedddiiippprrroooggg...cccooommmDediProg Page 3/8December 09WhileSPI flash is soldered on the Motherboard, engineers needa way to update the bios codes without unsoldering the SPI flash part. With the increasing SPI Flash densitiesrequirement for the BIOS codes(UEFI,advanced features..)Bios developers needoptimizedtoolsto reducethetime spent on bios code updateor BIOS debugging.Furthermore, some buses used for BIOS POST messages disappear (LPC connector, Com port, PCI slot) and some others require too heavy BIOS resources to be kept after production for RMA (USB) or are unstable.Development engineers, production, repairing serviceneed an alternativeway to access the Bios debug post messages. All the above requirements can be fulfilledb y using the SPI Bus designing a common 2*5 or 2*4 pin headerson the Motherboard.II.SPI Universal Pin HeaderThe SPI Universal Pin Header is recommended to offer a full compatibility with all the BIOS tools solutions and avoid confusion over the motherboards and platforms. Accordingto the features supported by the hardware, the pins can be connected to the signals or left unconnected. The pin header can be 2*5 or even 2*4. Table 1: SPI Universal Pin HeaderSignals nameP i n sSignals nameHold212CS2CS134VccMISO56Hold1IO378CKLGND910MOSITable 2: SPI Universal Pin HeaderPinsSignals n a m eDescription4VccThe Vcc pin must be connected to the SPI Flash Vcc.-SF100supplies the BIOS memory if update is performed with motherboard not supplied-SPI Flash Vcc suppliesBBFand SPI POST cardtools-SPI Flash memory level is monitored by EM100during emulation9GNDThe GND is the common ground between motherboard and BIOS tools5, 8, 10CKL, MOSI, MISOThese 3 SPI Signals must be common in case motherboard is using 2 SPI Flash3CS1Pin 3 is connected to Chip Select of SPI flash 1I.Background